Methods and devices for performing duplex mode detection
US9820272B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2016 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Jun 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W84/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement may include a first detection circuit configured to evaluate signal data of a carrier channel to identify a timing location of a synchronization signal within the signal data, a second detection circuit configured to, using the timing location as a reference point, extract a first candidate synchronization signal from a first candidate timing location of the signal data and to extract a second candidate synchronization signal from a second candidate timing location of the signal data, and a decision circuit configured to analyze the first detection synchronization signal and the second candidate synchronization signal to determine a duplex mode of the carrier channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.