Sub-blocks and meta pages for mapping table rebuild
US9823863B1 · kind B1 · utility
8Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2015 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | Jun 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data associated with logical addresses are received where the data is to be stored on a plurality of solid state storage dies and each of the plurality of solid state storage dies is independently accessible. Metadata is generated that includes the logical addresses where the metadata and the data sum to an amount of information that is less than a maximum amount of information that can be written to the plurality of solid state storage dies in a single write operation. The metadata and the data are stored in the plurality of solid state storage dies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.