Configurable storage blocks with embedded first-in first-out and delay line circuitry
US9824024B1 · kind B1 · utility
1Cited by
14References
24Claims
0Family size
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Key dates
| Filing date | Oct 31, 2014 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | May 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1776
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit may have configurable storage blocks. A configurable storage block may include a memory array, an arithmetic circuit, and a control circuit. The control circuit may be used to determine whether to operate the configurable storage block in a first mode which may provide random access to the memory array or in a second mode which may provide access to the memory array in a predefined order. Thus, the configurable storage block may implement first-in first-out modules, shift registers, or delay-line modules in addition to implementing memory modules with random access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.