Optical critical dimension target design
US9824176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2015 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | Nov 6, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01B2210/56
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A measurement target for a semiconductor device is designed. The semiconductor device includes a structure to be measured that has a spectrum response that is comparable to or below system noise level for an optical critical dimension measurement device to be used to measure the structure. The measurement target is designed by obtaining a process window and design rules for the semiconductor device and determining prospective pitches through modeling to identify pitches that produce a spectrum response from the structures that is at least 10 times greater than a system noise level for the optical critical dimension measurement device. A resonance window for each prospective pitch is determined and robustness of the resonance window is determined through modeling. Pitches of the array are selected based on the prospective pitches, resonance windows, and robustness. The target design may accordingly be produced and used to generate a measurement target.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.