Array substrate with redundant gate and data line repair structures
US9825062B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 13, 2015 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | Jul 13, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136263
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides an array substrate and a method of manufacturing the same, and a display device comprising the array substrate. The array substrate comprises: a substrate; gate lines and data lines arranged to intersect one another on the substrate; a gate line connection conducting wire layer provided between the gate lines and the substrate and below the gate lines; and/or, a data line connection conducting wire layer provided in regions of the array substrate corresponding to the data lines; wherein the gate line connection conducting wire layer is electrically isolated from the data line connection conducting wire layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.