Patent · US Active

Load balancer bypass

US9826033B2 · kind B2 · utility

0Cited by
71References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 17, 2015
Grant dateNov 21, 2017
Priority date
Expiry dateDec 17, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L12/56
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Redirecting message flows to bypass load balancers. A destination intermediary receives a source-side message that includes a virtual address of a load balancer as a destination, and that is augmented to include a network address of a destination machine as a destination. The destination intermediary determines that a source intermediary should address subsequent network messages that originate from a source machine and that are associated with the same multi-message flow to the destination machine while bypassing the load balancer. The destination intermediary modifies the source-side message so the destination for the source-side message addresses the destination machine, and passes the modified source-side message to the destination machine. The destination intermediary receives a response from the destination machine identifying the source machine as its destination, and modifies the response so a source address identifies the virtual address of the load balancer, and dispatches the modified response to the source machine.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.