Thin film transistor array panel having an oxide semiconductor including silicon
US9828666B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Aug 19, 2014 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Sep 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02631
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
An exemplary embodiment provides a thin film transistor array panel, including: a substrate; an oxide semiconductor layer disposed on the substrate; an insulating layer disposed on the oxide semiconductor layer; and a pixel electrode disposed on the insulating layer. The oxide semiconductor layer includes a first layer and a second layer disposed on the first layer, the second layer includes an oxide semiconductor including silicon, and the second layer contacts the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.