Electronic device
US9829961B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2014 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Feb 18, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device whose power consumption can be reduced appropriately depending on the condition of use by a user is provided. The electronic device having a power saving mode includes a processor and a plurality of memories configured to be able to become a stopped state individually, and available to the processor. The processor causes a predetermined number of memories among the plurality of memories to become the stopped state, based on a processing load of the processor, to thereby make a shift to the power saving mode. In the power saving mode, the processor has a standby state of restricting the operation of a part of the electronic device and an active state of normally controlling the operation of the electronic device, and maintains the stopped state of the predetermined number of memories regardless of whether the processor is in the standby state or the active state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.