CPU-to-GPU and GPU-to-GPU atomics
US9830210B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2013 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Sep 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention includes techniques for a first processing unit to perform an atomic operation on a memory page shared with a second processing unit. The memory page is associated with a page table entry corresponding to the first processing unit. Before executing the atomic operation, an MMU included in the first processing unit evaluates an atomic permission bit that is included in the page table entry. If the MMU determines that the atomic permission bit is inactive, then the two processing units coordinate to change the permission status of the memory page. As part of the status change, the atomic permission bit in the page table entry is activated. Subsequently, the first processing unit performs the atomic operation uninterrupted by the second processing unit. Advantageously, coordinating the processing unit via the atomic permission bit ensures the proper and efficient execution of the atomic operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.