Loading calculation method and loading calculation system for processor in electronic device
US9830242B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2015 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Jan 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a loading calculation method and a loading calculation system for a processor in an electronic device is disclosed. The loading calculation system comprises: a detecting unit, a determining unit, a generating unit, and a calculating unit. The loading calculation method comprises: detecting a plurality of switching actions of the processor to generate a detecting result; determining a time interval to separate the detecting result to generate a plurality of time periods; generating a log file of scheduling according to the detecting result and the plurality of time periods; utilizing the processor for enabling the log file of scheduling; and calculating the processor loading according to the log file of scheduling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.