Semiconductor device
US9831265B2 · kind B2 · utility
2Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | May 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
Abstract
Provided is a semiconductor device including a substrate, gate electrodes vertically stacked on the substrate, insulating patterns between the gate electrodes, an active pillar provided to penetrate the gate electrodes and the insulating patterns and electrically coupled with the substrate, and a memory pattern provided between the gate electrodes and the active pillar and between the insulating patterns and the active pillar. The gate electrodes include edge portions extending between the memory pattern and the insulating patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.