Nanoporous metal-oxide memory
US9831424B2 · kind B2 · utility
1Cited by
3References
13Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 27, 2015 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Jul 27, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A nanoporous (NP) memory may include a non-porous layer and a nanoporous layer sandwiched between the bottom and top electrodes. The memory may be free of diodes, selectors, and/or transistors that may be necessary in other memories to mitigate crosstalk. The nanoporous material of the nanoporous layer may be a metal oxide, metal chalcogenide, or a combination thereof. Further, the memory may lack any additional components. Further, the memory may be free from requiring an electroformation process to allow switching between ON/OFF states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.