Method and apparatus for simultaneous processing of multiple functions
US9831873B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2015 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Feb 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Electronic logic gates that operate using N logic state levels, where N is greater than 2, and methods of operating such gates. The electronic logic gates operate according to truth tables. At least two input signals each having a logic state that can range over more than two logic states are provided to the logic gates. The logic gates each provide an output signal that can have one of N logic states. Examples of gates described include NAND/NAND gates having two inputs A and B and NAND/NAND gates having three inputs A, B, and C, where A, B and C can take any of four logic states. Systems using such gates are described, and their operation illustrated. Optical logic gates that operate using N logic state levels are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.