Method for manufacturing layered electronic devices
US9832875B2 · kind B2 · utility
1Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2014 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Jul 24, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1105
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for fabricating printed electronics includes printing a trace of an electrical component on a first substrate to form a first layer. The method further includes printing a trace of an electrical component on at least one additional substrate to form at least one additional layer. The first layer is stacked with the at least one additional layer to create an assembled electrical device. At least one of the layers is modified after printing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.