Power off control circuit and electronic device using same
US9836105B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Aug 19, 2015 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Apr 25, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0175
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power-off control circuit applied in an electronic device includes a switch, a first control unit, a first buffer unit, a second control unit, and a second buffer unit. A first control unit coupled to the second terminal of the switch. The first control unit receives a first logic signal when the switch is pressed, and outputs a first control signal. A first buffer unit is coupled to an output of the first control unit to receive the first control signal, and outputs a second control signal. A second buffer unit is coupled to the second terminal of the switch to receive the first logic signal, and outputs a third control signal. A second control unit is coupled to an output of the second buffer unit to receive the third control signal, and outputs a power-off control signal to make the electronic device to power-off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.