Array substrate and display device
US9836155B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2015 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Jan 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04107
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are an array substrate and a display device which belong to the technical field of displays, and solve the technical problem that, in the existing in-cell technology, the manufacturing process of array substrates is too complex. The array substrate comprises a plurality of pixel units each having a thin film transistor, a plurality of common electrodes, and a plurality of address lines. The address lines each are formed by connecting a first metal wire and a second metal wire, the first metal wire being located at a same layer as a gate of the thin film transistor, and the second metal wire being located at a same layer as a source and a drain of the thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.