Patent · US Active

Integrated systems with universal serial Bus 2.0 and embedded universal serial Bus 2 connectivity

US9836420B2 · kind B2 · utility

2Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 11, 2015
Grant dateDec 5, 2017
Priority date
Expiry dateNov 3, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0042
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit is provided. The integrated circuit includes a mapping circuit configured to determine a state associated with a first universal series bus (USB) communication mode based on one or both of a signal level on a first data line and a signal level on a second data line. The integrated circuit also includes a line state converter circuit configured to generate a line state associated with a second USB communication mode based on the determined state and based on one or both of the signal level on the first data line and the signal level on the second data line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.