Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
US9837136B2 · kind B2 · utility
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4References
16Claims
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Key dates
| Filing date | Dec 28, 2015 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module, including a plurality of memory cells and a plurality of signal lines for communicating with a processing device. The memory module is configured such that following reception of a command and upon encountering a first condition while processing the command, the memory module limits a voltage on a first signal line of the plurality of signal lines to be no more than an intermediate voltage greater than voltage levels corresponding to a binary zero state and less than voltage levels corresponding to a binary one state for a period of time for indicating an occurrence of the first condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.