Semiconductor structure and fabrication method thereof
US9837323B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2016 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Jun 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/859
Abstract
The present disclosure provides a method for forming a semiconductor structure. The method includes providing a semiconductor substrate; forming a first active region, a second active region, a third active region, and a fourth active region in the semiconductor substrate; and forming a middle-voltage P well region (MVPW) in each of the first active region and the second region simultaneously and forming a middle-voltage N well (MVNW) region in each of the third active region and the fourth active region simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.