Polycrystalline silicon thin-film transistor
US9837542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2015 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Jul 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A polycrystalline silicon thin-film transistor includes a substrate; an isolation layer formed on the substrate; and a polycrystalline silicon active layer formed on the substrate and the isolation layer, with two source-drain ion implantation regions being formed at both sides of the active layer, wherein the edges at both ends of the isolation layer are within the edges at both ends of the active layer. In the polycrystalline silicon thin-film transistor and the method for manufacturing the same, it is possible to increase the grain size of the active layer, improve the grain uniformity in a channel region thereof, effectively prevent deterioration of characteristics of the active layer caused by backlight irradiation, and improve the reliability of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.