Field effect transistor current mode logic with changeable bulk configuration of load transistors
US9838019B2 · kind B2 · utility
0Cited by
0References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2011 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Nov 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09436
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A field effect transistor current mode differential logic circuit comprising load transistors for converting the current output of each differential leg current to voltage output, and means for configuring the bulk of each differential leg's load transistor to be connected to the drain of the load transistor for use the logic circuit in Subthreshold Source Coupled Logic (STSCL) mode, and means for configuring the bulk of each leg load transistor to be connected to a voltage or to source of the same transistor for use in MOS current more logic (MCML) operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.