Data storage device and flash memory control method
US9842030B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2017 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | May 17, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The data storage device included a flash memory, divided into a plurality of blocks with each block comprising a plurality of physical pages, and a control unit, coupling the flash memory to a host and comprising a microcontroller and a random access memory. The microcontroller maintains a plurality of logical-to-physical address mapping tables and a link table on the flash memory to record mapping information between the host and the flash memory and records a link table indicator on the flash memory to indicate a position of the link table. The link table indicates positions of the plurality of logical-to-physical address mapping tables, and each entry in the link table corresponds to one logical-to-physical address mapping table. Further, the microcontroller erases user of logical addresses corresponding to N logical-to-physical address mapping tables.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.