Integrated circuits with laterally diffused metal oxide semiconductor structures and methods for fabricating the same
US9842903B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2014 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Oct 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuits with improved laterally diffused metal oxide semiconductor (LDMOS) structures, and methods of fabricating the same, are provided. An exemplary LDMOS integrated circuit includes an n-type reduced surface field, a p-type body well disposed on a lateral side of the n-type reduced surface field region, a shallow trench isolation structure disposed within the n-type reduced surface field region, and a gate structure disposed partially over the p-type body well, partially over the n-type reduced surface field region, partially over the shallow trench isolation structure, and partially within the shallow trench isolation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.