ESD protection circuit
US9843183B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 2015 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An ESD protection circuit is disclosed, in which an RC trigger circuit and a transmission gate are used for determination of ESD protection triggering, and a silicon-controlled rectifier for ESD current conductance. The RC trigger circuit and the transmission gate allow improved trigger efficiency. In addition, the silicon-controlled rectifier incorporates first and second resistors, which can be implemented to have very low resistance values and are therefore able to effectively prevent the occurrence of latch-up during normal operation, as well as pull-up and pull-down transistors which can make an additional contribution to latch-up inhibition when turned on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.