Balanced differential transimpedance amplifier with single ended input and balancing method
US9843297B2 · kind B2 · utility
1Cited by
4References
21Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 30, 2015 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Jul 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45702
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.