Fan-out packages and methods of forming same

US9847269B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Jing-Cheng Lin · Baoshan, TW
• Jeffrey Chang · Baoshan, TW
• Chun-Hsing Su · New Taipei, TW
• Tsei-Chung Fu · Toufen, TW
• Yi-Chao Mao · Pingzhen District, TW

Key dates

• Filing date: Jul 31, 2015
• Grant date: Dec 19, 2017
• Expiry date: Jul 31, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/18162
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An embodiment a device package includes a semiconductor die, a molding compound extending along sidewalls of the semiconductor die, and a planarizing polymer layer over the molding compound and extending along the sidewalls of the semiconductor die. The molding compound includes first fillers, and the planarizing polymer layer includes second fillers smaller than the first fillers. The device package further includes one or more fan-out redistribution layers (RDLs) electrically connected to the semiconductor die, wherein the one or more fan-out RDLs extend past edges of the semiconductor die onto a top surface of the planarizing polymer layer.