Armature-clad MRAM device
US9847476B2 · kind B2 · utility
2Cited by
8References
20Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 14, 2017 |
| Grant date | Dec 19, 2017 |
| Priority date | — |
| Expiry date | Feb 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
Abstract
A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.