Storage class memory (SCM) memory mode cache system
US9852060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2016 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Jun 17, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/313
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An SCM memory mode NVDIMM-N cache system includes an SCM subsystem, and an NVDIMM-N subsystem having at volatile memory device(s) and non-volatile memory device(s). A memory controller writes data to the volatile memory device(s) and, in response, updates a cache tracking database. The memory controller then writes a subset of the data to the SCM subsystem subsequent to the writing of that data to the volatile memory device(s) and, in response, updates the cache tracking database. The memory controller then receives a shutdown signal and, in response, copies the cache tracking database to the volatile memory device(s) in the NVDIMM-N subsystem. The NVDIMM-N subsystem then copies at least some of the data and the cache tracking database from the volatile memory device(s) to the non-volatile memory device(s) prior to shutdown. The data and the cache tracking database may then be retrieved from non-volatile memory device(s) when the system is restored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.