High speed serial link in-band lane fail over for RAS and power management
US9852096B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2014 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Aug 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2001/0096
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method provide a communications link having a plurality of lanes, and an in-band, real-time physical layer protocol that keeps all lanes on-line, while failing lanes are removed, for continuous service during fail over operations. Lane status is monitored real-time at the physical layer receiver, where link error rate, per lane error performance, and other channel metrics are known. If a lane failure is established, a single round trip request/acknowledge protocol exchange with the remote port completes the fail over. If a failing lane meets an acceptable performance level, it remains on-line during the round trip exchange, resulting in uninterrupted link service. Lanes may be brought in or out of service to meet reliability, availability, and power consumption goals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.