Extensible timer for chip card communications
US9852412B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2014 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Mar 24, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q20/341
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
A payment card reader for reading integrated circuit (IC) payment cards is disclosed. The payment card reader includes a microcontroller having non-programmable logic, coupled with a data input from the IC payment card, configured to effect a first implementation of a communication standard for communication between the microprocessor and the IC payment card, the non-programmable logic comprising a non-programmable hardware timer. The microcontroller also includes extensible logic, coupled with the data input via a general-purpose input/output (GPIO) pin, the extensible logic configured to include an extensible timer and interrupt logic, the extensible timer and interrupt logic for use with the non-programmable logic and the data input to effect a second implementation of the communication standard for communication between the microprocessor and the IC payment card.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.