Device and method for scalable coding of video information
US9854270B2 · kind B2 · utility
31Cited by
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18Claims
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Key dates
| Filing date | Dec 18, 2014 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Sep 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a first video layer having a current picture. The processor is configured to process a first offset associated with the current picture, the first offset indicating a difference between (a) most significant bits (MSBs) of a first picture order count (POC) of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.