Test circuit board adapted to be used on memory slot
US9857425B2 · kind B2 · utility
1Cited by
2References
4Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Mar 17, 2016 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Mar 17, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/273
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test circuit board adapted to be used on memory slot is provided. Each memory slot of a board to be tested is connected to one test circuit board. A plurality of the test circuit boards form an in-series connection therebetween. A test access port (TAP) controller is connected electrically to the board to be tested and one of the test circuit boards so that the memory slots, which are connected to the test circuit boards, may be tested at the same time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.