Decoupling host and device address maps for a peripheral component interconnect express controller
US9858007B2 · kind B2 · utility
0Cited by
5References
20Claims
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Key dates
| Filing date | May 28, 2014 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Dec 24, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0689
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller includes a virtual memory mapped to device-side Peripheral component interconnect express address space includes virtual buffers allocation for each data transfer. Each virtual buffer is associated with a scatter/gather list entry in a host memory. The controller executes direct transfers between Peripheral component interconnect express devices and host memory without introducing address mapping dependencies between the host and device domains.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.