Chip capacitor and method for manufacturing the same
US9859061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2012 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Aug 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/85
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
[Theme] To provide a chip capacitor capable of easily and rapidly accommodating a plurality of types of capacitance values using a common design and a method for manufacturing the chip capacitor. [Solution] A chip capacitor 1 includes a substrate 2, a first external electrode 3, a second external electrode 4, capacitor elements C1 to C19, and fuses F1 to F9 disposed on the substrate 2. The capacitor elements C1 to C19 respectively include a first electrode film 11, a first capacitance film 12 on the first electrode film 11, a second electrode film 13 disposed on the first capacitance film 12 and facing the first electrode film 11, a second capacitance film 17 on the second electrode film 13, and a third electrode film 16 disposed on the second capacitance film 17 and facing the second electrode film 13 and are connected between the first external electrode 3 and the second external electrode 4. The fuses F1 to F9 are each interposed between the capacitor elements C1 to C19 and the first external electrode 3 or the second external electrode 4 and are capable of disconnecting each of the capacitor elements C1 to C19.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.