Methods for manufacturing a semiconductor device
US9859163B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2016 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Aug 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0133
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes forming gate structures spaced apart from each other on a substrate, gate spacers covering sidewalls of the gate structures, and an interlayer insulating layer covering the gate spacers, forming a contact hole that penetrates the interlayer insulating layer to expose a sidewall of at least one of the gate spacers, forming a sacrificial gap-fill pattern filling a lower portion of the contact hole, forming a contact spacer on a sidewall of the contact hole having the sacrificial gap-fill pattern, and forming a contact filling the contact hole after removing the sacrificial gap-fill pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.