Harmonics suppression filter
US9859601B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 8, 2015 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Nov 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2001/0085
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A harmonics suppression filter includes a main circuit, a first inner circuit, a first outer circuit, a first inner node and a first outer node. The first inner circuit, the first outer circuit and the main circuit are in the same layer of the base board. Meanwhile, the first inner circuit is located inside of the main circuit. There is an inner gap between the first inner circuit and the main circuit. The first outer circuit is located outside of the main circuit. There is an outer gap between the first outer circuit and the main circuit. The first inner node is located in the inner gap to couple the first inner circuit with the main circuit. The first outer node is located in the outer gap to couple the first outer circuit with the main circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.