Silicon photonic chip with through VIAS
US9864133B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2016 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Jul 13, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/124
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.