Implementing cable failover in multiple cable PCI express IO interconnections
US9864662B2 · kind B2 · utility
5Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2016 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Mar 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system and computer program product are provided for implementing cable failover in multiple cable Peripheral Component Interconnect Express (PCIE) IO interconnections to an external IO enclosure. System firmware is provided for implementing health check functions for the PCIE IO interconnections to identify a faulted low byte cable. A cable failover mechanism recovers a PCI link to the external IO enclosure. A multiplexer logic is provided between the PCIE host bridge (PHB) and the cable connected to the IO enclosure to perform a full lane reversal of the PCIE lanes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.