Reducing decryption latency for encryption processing
US9864863B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2014 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Nov 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In a compression processing storage system, using a pool of encryption processing cores, the encryption processing cores are assigned to process either encryption operations, decryption operations, and decryption and encryption operations, that are scheduled for processing. A maximum number of the encryption processing cores are set for processing only the decryption operations, thereby lowering a decryption latency. A minimal number of the encryption processing cores are allocated for processing the encryption operations, thereby increasing encryption latency. Upon reaching a throughput limit for the encryption operations that causes the minimal number of the plurality of encryption processing cores to reach a busy status, the minimal number of the plurality of encryption processing cores for processing the encryption operations is increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.