Primary and secondary servo timing gates used with simultaneously operating readers
US9865291B1 · kind B1 · utility
3Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 22, 2017 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | May 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B5/59644
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
First and second read channel logic circuits are configured to process first and second signals communicated from respective first and second readers that simultaneously read from a magnetic disk. A first servo detection circuit generates a primary servo gate based on timing data from the first reader. The primary servo gate is used for processing the first signal via the first read channel logic. A second servo detection circuit that generates a secondary servo gate based on the primary servo gate and an adjustment value. The secondary servo gate is used for processing the second signal via the second read channel logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.