Method for reading out a resistive memory cell and a memory cell for carrying out the method
US9865343B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 29, 2014 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Oct 29, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reading out a resistive memory cell comprising two electrodes that are spaced from each other by an ion-conducting resistive material was developed, the memory cells being transferrable from a stable state having a higher resistance value (high resistive state, HRS) to a stable state having a lower resistance value (low resistive state, LRS) when a write voltage is applied. A read voltage is applied as a read pulse for reading out, wherein the number of ions driven through the ion-conducting resistive material during the pulse is set by way of the level and duration of the pulse in such a way, proceeding from the HRS state, they suffice for forming an electrically conducting path through the ion-conducting resistive material at least until the onset of a flow of current through this path, and thus for the transition into a metastable VRS state (volatile resistance state) having a reduced resistance value and a predefined relaxation time for return into the HRS state, but not for transition into the LRS state. In this way, it is ensured that, in all cases, the memory cell once is again in the same state after the read-out as it was prior to the read-out. This allows in …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.