Semiconductor device with peripheral void space and method of making the same
US9865680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2016 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Aug 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first semiconductor region of a first conductivity type on a first electrode and a second semiconductor region of the first conductivity type on a central portion of the first semiconductor region. The second region has a carrier concentration less than a carrier concentration of the first region. A third semiconductor region of a second conductivity type is on the second semiconductor region. A first insulating portion covers a peripheral surface of the second semiconductor region and a peripheral surface of the third semiconductor region. A second insulating portion is spaced from the first insulating portion in a lateral direction. A void space is between the first and second insulating portions. A third insulating portion is on the third semiconductor region and spans and covers the void space. A second electrode is on the third semiconductor region and the third insulating portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.