Hardware acceleration wait time awareness in central processing units with multi-thread architectures
US9870255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2012 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Jun 13, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/509
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a hardware accelerator, central processing unit, and computing device. A hardware accelerator includes a task accelerating unit configured to, in response to a request for a new task issued by a hardware thread, accelerate the processing of the new task and produce a processing result for the task; a task time prediction unit configured to predict the total waiting time of the new task for returning to a specified address associated with the hardware thread. One aspect of this disclosure makes the hardware thread aware of the time to be waited for before getting a processing result, facilitating its task planning accordingly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.