Graphic processing unit and method of performing, by graphic processing unit, tile-based graphics pipeline
US9870639B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2015 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Dec 1, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T11/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Computing apparatus and methods are provided for performing a tile-based graphics pipeline. The graphics pipeline includes a binning pipeline configured to generate a tile list of objects indicating which tile vertices, primitives, or patches the objects belong to; and a rendering pipeline configured to render an object, per tile, based on the tile list generated in the binning pipeline. Each of the binning pipeline and the rendering pipeline is configured to implement a tessellation pipeline. The graphics pipeline may be configured to operate in an efficiency mode to defer or lower tessellation by performing tessellation in one of the binning and rendering pipelines or by setting a new lower tessellation factor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.