Semiconductor device and an electronic apparatus
US9871031B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2015 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Nov 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/815
Abstract
A semiconductor device includes a P-type substrate, and an N-well in the P-type substrate. A first N+ diffusion region is located in the P-type substrate, and a first P+ diffusion region is located in the N-well. A second P+ diffusion region is located across a boundary between the P-type substrate and the N-well. A first gate electrode overlies the N-well between the first P+ diffusion regions and the second P+ diffusion region. A second gate electrode overlies the P-type substrate between the second P+ diffusion region and the first N+ diffusion region. The first P+ diffusion region, the N-well, the P-type substrate, and the first N+ diffusion region form an SCR (Silicon-Controlled rectifier) device. The first P+ diffusion region, the second P+ diffusion region, and the first gate electrode form a PMOS transistor. The second P+ diffusion region, the first N+ diffusion region, and the second gate electrode form a gated diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.