Method and vector computing unit for implementing de-scrambling and de-spreading, and computer storage medium
US9871554B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2014 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Jul 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W84/042
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Provided are a method and vector computing unit for implementing de-scrambling and de-spreading, and a computer storage medium. The method includes that: an operation of complex multiplication on baseband data and corresponding de-scrambling and de-spreading codes is performed by adopting data transformation and addition, and data obtained by the complex multiplication is stored into a vector register file; a row of data obtained by the complex multiplication is read from the vector register file, every two adjacent pieces of data in the row of data are accumulated to obtain a half row of data, a ¼ row of data, and finally one piece of accumulated data; and the accumulation processing is continued on other rows of data to implement accumulation of each row of data obtained by the complex multiplication in the vector register file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.