Policer architecture
US9871733B2 · kind B2 · utility
1Cited by
13References
52Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2015 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Apr 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/5682
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A policer system on one or more place and/or route blocks. The policer system including a plurality of local physical policers each stored in a plurality of physical memory banks and coupled with a plurality of global policers stored in one or more global banks separate from the physical banks. Thus, each bank of the global policers are able to represent a logical combination of a plurality of the physical banks of physical policers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.