Patent · US Active

Method of forming an integrated circuit and related integrated circuit

US9874689B2 · kind B2 · utility

2Cited by
2References
19Claims
0Family size

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Key dates

Filing dateJan 14, 2015
Grant dateJan 23, 2018
Priority date
Expiry dateJan 14, 2035

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P70/50
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

A method (100) of forming an integrated circuit is disclosed. The method comprises: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing (104) the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding (106) at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.