Electronic device having scratchpad memory and management method for scratchpad memory
US9875191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2015 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | Jan 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device having a scratchpad memory and a management method are provided. A recording circuit records multiple counter values which correspond to entries in a Translation Lookaside Buffer (TLB). A virtual address is matched with a first entry. If a cache miss occurs, the recording circuit updates a first counter value corresponding to the first entry, and determines if the first counter value meets a threshold criterion. If the first counter value meets the threshold criterion, the recording circuit transmits an interrupts signal to a processing unit, and the processing unit moves data into the scratchpad memory. If the first counter value does not meet the threshold criterion, the data is moved into a cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.