Gate driving circuit with reduced voltage to mitigate transistor deterioration
US9875710B2 · kind B2 · utility
10Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2015 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | May 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit includes first and second driving stages respectively driving first and second gate lines of a display panel. The first driving stage includes output transistors, a first control transistor controlling an electric potential of a control node in response to a signal provided from the second driving stage through an input terminal before a first gate signal is output, and a second control transistor applying a first carry signal to the input electrode of the first control transistor while the first gate signal is output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.